Module core::arch::arm

source · []
🔬 This is a nightly-only experimental API. (stdsimd #27731)
Available on ARM only.
Expand description

Platform-specific intrinsics for the arm platform.

See the module documentation for more details.

Modules

dspExperimental

References:

Structs

ISHExperimental

Inner Shareable is the required shareability domain, reads and writes are the required access types

ISHLDExperimental

Inner Shareable is the required shareability domain, reads are the required access type

ISHSTExperimental

Inner Shareable is the required shareability domain, writes are the required access type

LDExperimental

Full system is the required shareability domain, reads are the required access type

NSHExperimental

Non-shareable is the required shareability domain, reads and writes are the required access types

NSHLDExperimental

Non-shareable is the required shareability domain, reads are the required access type

NSHSTExperimental

Non-shareable is the required shareability domain, writes are the required access type

OSHExperimental

Outer Shareable is the required shareability domain, reads and writes are the required access types

OSHLDExperimental

Outer Shareable is the required shareability domain, reads are the required access type

OSHSTExperimental

Outer Shareable is the required shareability domain, writes are the required access type

STExperimental

Full system is the required shareability domain, writes are the required access type

SYExperimental

Full system is the required shareability domain, reads and writes are the required access types

int8x4_tExperimental

ARM-specific 32-bit wide vector of four packed i8.

int16x2_tExperimental

ARM-specific 32-bit wide vector of two packed i16.

uint8x4_tExperimental

ARM-specific 32-bit wide vector of four packed u8.

uint16x2_tExperimental

ARM-specific 32-bit wide vector of two packed u16.

ARM-specific 64-bit wide vector of two packed f32.

ARM-specific type containing two float32x2_t vectors.

ARM-specific type containing three float32x2_t vectors.

ARM-specific type containing four float32x2_t vectors.

ARM-specific 128-bit wide vector of four packed f32.

ARM-specific type containing two float32x4_t vectors.

ARM-specific type containing three float32x4_t vectors.

ARM-specific type containing four float32x4_t vectors.

ARM-specific 64-bit wide vector of eight packed i8.

ARM-specific type containing two int8x8_t vectors.

ARM-specific type containing three int8x8_t vectors.

ARM-specific type containing four int8x8_t vectors.

ARM-specific 128-bit wide vector of sixteen packed i8.

ARM-specific type containing two int8x16_t vectors.

ARM-specific type containing three int8x16_t vectors.

ARM-specific type containing four int8x16_t vectors.

ARM-specific 64-bit wide vector of four packed i16.

ARM-specific type containing two int16x4_t vectors.

ARM-specific type containing three int16x4_t vectors.

ARM-specific type containing four int16x4_t vectors.

ARM-specific 128-bit wide vector of eight packed i16.

ARM-specific type containing two int16x8_t vectors.

ARM-specific type containing three int16x8_t vectors.

ARM-specific type containing four int16x8_t vectors.

ARM-specific 64-bit wide vector of two packed i32.

ARM-specific type containing two int32x2_t vectors.

ARM-specific type containing three int32x2_t vectors.

ARM-specific type containing four int32x2_t vectors.

ARM-specific 128-bit wide vector of four packed i32.

ARM-specific type containing two int32x4_t vectors.

ARM-specific type containing three int32x4_t vectors.

ARM-specific type containing four int32x4_t vectors.

ARM-specific 64-bit wide vector of one packed i64.

ARM-specific type containing four int64x1_t vectors.

ARM-specific type containing four int64x1_t vectors.

ARM-specific type containing four int64x1_t vectors.

ARM-specific 128-bit wide vector of two packed i64.

ARM-specific type containing four int64x2_t vectors.

ARM-specific type containing four int64x2_t vectors.

ARM-specific type containing four int64x2_t vectors.

ARM-specific 64-bit wide polynomial vector of eight packed p8.

ARM-specific type containing two poly8x8_t vectors.

ARM-specific type containing three poly8x8_t vectors.

ARM-specific type containing four poly8x8_t vectors.

ARM-specific 128-bit wide vector of sixteen packed p8.

ARM-specific type containing two poly8x16_t vectors.

ARM-specific type containing three poly8x16_t vectors.

ARM-specific type containing four poly8x16_t vectors.

ARM-specific 64-bit wide vector of four packed p16.

ARM-specific type containing two poly16x4_t vectors.

ARM-specific type containing three poly16x4_t vectors.

ARM-specific type containing four poly16x4_t vectors.

ARM-specific 128-bit wide vector of eight packed p16.

ARM-specific type containing two poly16x8_t vectors.

ARM-specific type containing three poly16x8_t vectors.

ARM-specific type containing four poly16x8_t vectors.

ARM-specific 64-bit wide vector of one packed p64.

ARM-specific type containing four poly64x1_t vectors.

ARM-specific type containing four poly64x1_t vectors.

ARM-specific type containing four poly64x1_t vectors.

ARM-specific 128-bit wide vector of two packed p64.

ARM-specific type containing four poly64x2_t vectors.

ARM-specific type containing four poly64x2_t vectors.

ARM-specific type containing four poly64x2_t vectors.

ARM-specific 64-bit wide vector of eight packed u8.

ARM-specific type containing two uint8x8_t vectors.

ARM-specific type containing three uint8x8_t vectors.

ARM-specific type containing four uint8x8_t vectors.

ARM-specific 128-bit wide vector of sixteen packed u8.

ARM-specific type containing two uint8x16_t vectors.

ARM-specific type containing three uint8x16_t vectors.

ARM-specific type containing four uint8x16_t vectors.

ARM-specific 64-bit wide vector of four packed u16.

ARM-specific type containing two uint16x4_t vectors.

ARM-specific type containing three uint16x4_t vectors.

ARM-specific type containing four uint16x4_t vectors.

ARM-specific 128-bit wide vector of eight packed u16.

ARM-specific type containing two uint16x8_t vectors.

ARM-specific type containing three uint16x8_t vectors.

ARM-specific type containing four uint16x8_t vectors.

ARM-specific 64-bit wide vector of two packed u32.

ARM-specific type containing two uint32x2_t vectors.

ARM-specific type containing three uint32x2_t vectors.

ARM-specific type containing four uint32x2_t vectors.

ARM-specific 128-bit wide vector of four packed u32.

ARM-specific type containing two uint32x4_t vectors.

ARM-specific type containing three uint32x4_t vectors.

ARM-specific type containing four uint32x4_t vectors.

ARM-specific 64-bit wide vector of one packed u64.

ARM-specific type containing four uint64x1_t vectors.

ARM-specific type containing four uint64x1_t vectors.

ARM-specific type containing four uint64x1_t vectors.

ARM-specific 128-bit wide vector of two packed u64.

ARM-specific type containing four uint64x2_t vectors.

ARM-specific type containing four uint64x2_t vectors.

ARM-specific type containing four uint64x2_t vectors.

Functions

__breakpointExperimental

Inserts a breakpoint instruction.

__clrexExperimental

Removes the exclusive lock created by LDREX

__crc32bExperimentalcrc

CRC32 single round checksum for bytes (8 bits).

__crc32cbExperimentalcrc

CRC32-C single round checksum for bytes (8 bits).

__crc32chExperimentalcrc

CRC32-C single round checksum for half words (16 bits).

__crc32cwExperimentalcrc

CRC32-C single round checksum for words (32 bits).

__crc32hExperimentalcrc

CRC32 single round checksum for half words (16 bits).

__crc32wExperimentalcrc

CRC32 single round checksum for words (32 bits).

__dbgExperimental

Generates a DBG instruction.

__dmbExperimental

Generates a DMB (data memory barrier) instruction or equivalent CP15 instruction.

__dsbExperimental

Generates a DSB (data synchronization barrier) instruction or equivalent CP15 instruction.

__isbExperimental

Generates an ISB (instruction synchronization barrier) instruction or equivalent CP15 instruction.

__ldrexExperimental

Executes an exclusive LDR instruction for 32 bit value.

__ldrexbExperimental

Executes an exclusive LDR instruction for 8 bit value.

__ldrexhExperimental

Executes an exclusive LDR instruction for 16 bit value.

__nopExperimental

Generates an unspecified no-op instruction.

__qaddExperimental

Signed saturating addition

__qadd8Experimental

Saturating four 8-bit integer additions

__qadd16Experimental

Saturating two 16-bit integer additions

__qasxExperimental

Returns the 16-bit signed saturated equivalent of

__qdblExperimental

Insert a QADD instruction

__qsaxExperimental

Returns the 16-bit signed saturated equivalent of

__qsubExperimental

Signed saturating subtraction

__qsub8Experimental

Saturating two 8-bit integer subtraction

__qsub16Experimental

Saturating two 16-bit integer subtraction

__rsrExperimental

Reads a 32-bit system register

__rsr64Experimental

Reads a 64-bit system register

__rsrpExperimental

Reads a system register containing an address

__sadd8Experimental

Returns the 8-bit signed saturated equivalent of

__sadd16Experimental

Returns the 16-bit signed saturated equivalent of

__sasxExperimental

Returns the 16-bit signed equivalent of

__selExperimental

Select bytes from each operand according to APSR GE flags

__sevExperimental

Generates a SEV (send a global event) hint instruction.

__sevlExperimental

Generates a send a local event hint instruction.

__shadd8Experimental

Signed halving parallel byte-wise addition.

__shadd16Experimental

Signed halving parallel halfword-wise addition.

__shsub8Experimental

Signed halving parallel byte-wise subtraction.

__shsub16Experimental

Signed halving parallel halfword-wise subtraction.

__smlabbExperimental

Insert a SMLABB instruction

__smlabtExperimental

Insert a SMLABT instruction

__smladExperimental

Dual 16-bit Signed Multiply with Addition of products and 32-bit accumulation.

__smlatbExperimental

Insert a SMLATB instruction

__smlattExperimental

Insert a SMLATT instruction

__smlawbExperimental

Insert a SMLAWB instruction

__smlawtExperimental

Insert a SMLAWT instruction

__smlsdExperimental

Dual 16-bit Signed Multiply with Subtraction of products and 32-bit accumulation and overflow detection.

__smuadExperimental

Signed Dual Multiply Add.

__smuadxExperimental

Signed Dual Multiply Add Reversed.

__smulbbExperimental

Insert a SMULBB instruction

__smulbtExperimental

Insert a SMULTB instruction

__smultbExperimental

Insert a SMULTB instruction

__smulttExperimental

Insert a SMULTT instruction

__smulwbExperimental

Insert a SMULWB instruction

__smulwtExperimental

Insert a SMULWT instruction

__smusdExperimental

Signed Dual Multiply Subtract.

__smusdxExperimental

Signed Dual Multiply Subtract Reversed.

__ssub8Experimental

Inserts a SSUB8 instruction.

__strexExperimental

Executes an exclusive STR instruction for 32 bit values

__strexbExperimental

Executes an exclusive STR instruction for 8 bit values

__usad8Experimental

Sum of 8-bit absolute differences.

__usada8Experimental

Sum of 8-bit absolute differences and constant.

__usub8Experimental

Inserts a USUB8 instruction.

__wfeExperimental

Generates a WFE (wait for event) hint instruction, or nothing.

__wfiExperimental

Generates a WFI (wait for interrupt) hint instruction, or nothing.

__wsrExperimental

Writes a 32-bit system register

__wsr64Experimental

Writes a 64-bit system register

__wsrpExperimental

Writes a system register containing an address

__yieldExperimental

Generates a YIELD hint instruction.

_clz_u8Experimental

Count Leading Zeros.

_clz_u16Experimental

Count Leading Zeros.

_clz_u32Experimental

Count Leading Zeros.

_rbit_u32Experimental

Reverse the bit order.

_rev_u16Experimental

Reverse the order of the bytes.

_rev_u32Experimental

Reverse the order of the bytes.

vaesdq_u8Experimentalaes

AES single round decryption.

vaeseq_u8Experimentalaes

AES single round encryption.

vaesimcq_u8Experimentalaes

AES inverse mix columns.

vaesmcq_u8Experimentalaes

AES mix columns.

vcvtq_s32_f32Experimentalneon and v7

Floating-point Convert to Signed fixed-point, rounding toward Zero (vector)

vcvtq_u32_f32Experimentalneon and v7

Floating-point Convert to Unsigned fixed-point, rounding toward Zero (vector)

vld1_f32Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_p8Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_p16Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_p64Experimentalneon,aes

Load multiple single-element structures to one, two, three, or four registers.

vld1_s8Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_s16Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_s32Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_s64Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_u8Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_u16Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_u32Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1_u64Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_f32Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_p8Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_p16Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_p64Experimentalneon,aes

Load multiple single-element structures to one, two, three, or four registers.

vld1q_s8Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_s16Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_s32Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_s64Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_u8Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_u16Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_u32Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vld1q_u64Experimentalneon,v7

Load multiple single-element structures to one, two, three, or four registers.

vmmlaq_s32Experimentali8mm and neon

8-bit integer matrix multiply-accumulate

vmmlaq_u32Experimentali8mm and neon

8-bit integer matrix multiply-accumulate

vsha1cq_u32Experimentalsha2

SHA1 hash update accelerator, choose.

vsha1h_u32Experimentalsha2

SHA1 fixed rotate.

vsha1mq_u32Experimentalsha2

SHA1 hash update accelerator, majority.

vsha1pq_u32Experimentalsha2

SHA1 hash update accelerator, parity.

vsha1su0q_u32Experimentalsha2

SHA1 schedule update accelerator, first part.

vsha1su1q_u32Experimentalsha2

SHA1 schedule update accelerator, second part.

vsha256h2q_u32Experimentalsha2

SHA256 hash update accelerator, upper part.

vsha256hq_u32Experimentalsha2

SHA256 hash update accelerator.

vsha256su0q_u32Experimentalsha2

SHA256 schedule update accelerator, first part.

vsha256su1q_u32Experimentalsha2

SHA256 schedule update accelerator, second part.

vsli_n_p8Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_p16Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_p64Experimentalneon,v7,aes

Shift Left and Insert (immediate)

vsli_n_s8Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_s16Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_s32Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_s64Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_u8Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_u16Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_u32Experimentalneon,v7

Shift Left and Insert (immediate)

vsli_n_u64Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_p8Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_p16Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_p64Experimentalneon,v7,aes

Shift Left and Insert (immediate)

vsliq_n_s8Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_s16Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_s32Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_s64Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_u8Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_u16Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_u32Experimentalneon,v7

Shift Left and Insert (immediate)

vsliq_n_u64Experimentalneon,v7

Shift Left and Insert (immediate)

vsri_n_p8Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_p16Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_p64Experimentalneon,v7,aes

Shift Right and Insert (immediate)

vsri_n_s8Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_s16Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_s32Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_s64Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_u8Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_u16Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_u32Experimentalneon,v7

Shift Right and Insert (immediate)

vsri_n_u64Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_p8Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_p16Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_p64Experimentalneon,v7,aes

Shift Right and Insert (immediate)

vsriq_n_s8Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_s16Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_s32Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_s64Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_u8Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_u16Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_u32Experimentalneon,v7

Shift Right and Insert (immediate)

vsriq_n_u64Experimentalneon,v7

Shift Right and Insert (immediate)

vst1_f32Experimentalneon,v7
vst1_p8Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_p16Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_p64Experimentalneon,aes,v8

Store multiple single-element structures from one, two, three, or four registers.

vst1_s8Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_s16Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_s32Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_s64Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_u8Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_u16Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_u32Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1_u64Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_f32Experimentalneon,v7
vst1q_p8Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_p16Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_p64Experimentalneon,aes,v8

Store multiple single-element structures from one, two, three, or four registers.

vst1q_s8Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_s16Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_s32Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_s64Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_u8Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_u16Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_u32Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vst1q_u64Experimentalneon,v7

Store multiple single-element structures from one, two, three, or four registers.

vtbl1_p8Experimentalneon,v7

Table look-up

vtbl1_s8Experimentalneon,v7

Table look-up

vtbl1_u8Experimentalneon,v7

Table look-up

vtbl2_p8Experimentalneon,v7

Table look-up

vtbl2_s8Experimentalneon,v7

Table look-up

vtbl2_u8Experimentalneon,v7

Table look-up

vtbl3_p8Experimentalneon,v7

Table look-up

vtbl3_s8Experimentalneon,v7

Table look-up

vtbl3_u8Experimentalneon,v7

Table look-up

vtbl4_p8Experimentalneon,v7

Table look-up

vtbl4_s8Experimentalneon,v7

Table look-up

vtbl4_u8Experimentalneon,v7

Table look-up

vtbx1_p8Experimentalneon,v7

Extended table look-up

vtbx1_s8Experimentalneon,v7

Extended table look-up

vtbx1_u8Experimentalneon,v7

Extended table look-up

vtbx2_p8Experimentalneon,v7

Extended table look-up

vtbx2_s8Experimentalneon,v7

Extended table look-up

vtbx2_u8Experimentalneon,v7

Extended table look-up

vtbx3_p8Experimentalneon,v7

Extended table look-up

vtbx3_s8Experimentalneon,v7

Extended table look-up

vtbx3_u8Experimentalneon,v7

Extended table look-up

vtbx4_p8Experimentalneon,v7

Extended table look-up

vtbx4_s8Experimentalneon,v7

Extended table look-up

vtbx4_u8Experimentalneon,v7

Extended table look-up

vusmmlaq_s32Experimentali8mm and neon

Unsigned and signed 8-bit integer matrix multiply-accumulate

Signed Absolute difference and Accumulate Long

Signed Absolute difference and Accumulate Long

Signed Absolute difference and Accumulate Long

Unsigned Absolute difference and Accumulate Long

Unsigned Absolute difference and Accumulate Long

Unsigned Absolute difference and Accumulate Long

Absolute difference between the arguments of Floating

Absolute difference between the arguments

Absolute difference between the arguments

Absolute difference between the arguments

Absolute difference between the arguments

Absolute difference between the arguments

Absolute difference between the arguments

Signed Absolute difference Long

Signed Absolute difference Long

Signed Absolute difference Long

Unsigned Absolute difference Long

Unsigned Absolute difference Long

Unsigned Absolute difference Long

Absolute difference between the arguments of Floating

Absolute difference between the arguments

Absolute difference between the arguments

Absolute difference between the arguments

Absolute difference between the arguments

Absolute difference between the arguments

Absolute difference between the arguments

Floating-point absolute value

Absolute value (wrapping).

Absolute value (wrapping).

Absolute value (wrapping).

Floating-point absolute value

Absolute value (wrapping).

Absolute value (wrapping).

Absolute value (wrapping).

Vector add.

Bitwise exclusive OR

Bitwise exclusive OR

Bitwise exclusive OR

Vector add.

Vector add.

Vector add.

Vector add.

Vector add.

Vector add.

Add returning High Narrow (high half).

Add returning High Narrow (high half).

Add returning High Narrow (high half).

Add returning High Narrow (high half).

Add returning High Narrow (high half).

Add returning High Narrow (high half).

Add returning High Narrow.

Add returning High Narrow.

Add returning High Narrow.

Add returning High Narrow.

Add returning High Narrow.

Add returning High Narrow.

Signed Add Long (vector, high half).

Signed Add Long (vector, high half).

Signed Add Long (vector, high half).

Unsigned Add Long (vector, high half).

Unsigned Add Long (vector, high half).

Unsigned Add Long (vector, high half).

Signed Add Long (vector).

Signed Add Long (vector).

Signed Add Long (vector).

Unsigned Add Long (vector).

Unsigned Add Long (vector).

Unsigned Add Long (vector).

Vector add.

Bitwise exclusive OR

Bitwise exclusive OR

Bitwise exclusive OR

Bitwise exclusive OR

Vector add.

Vector add.

Vector add.

Vector add.

Vector add.

Vector add.

Vector add.

Vector add.

Signed Add Wide (high half).

Signed Add Wide (high half).

Signed Add Wide (high half).

Unsigned Add Wide (high half).

Unsigned Add Wide (high half).

Unsigned Add Wide (high half).

Signed Add Wide.

Signed Add Wide.

Signed Add Wide.

Unsigned Add Wide.

Unsigned Add Wide.

Unsigned Add Wide.

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise and

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Vector bitwise bit clear

Bitwise Select.

Bitwise Select.

Bitwise Select.

Bitwise Select instructions. This instruction sets each bit in the destination SIMD&FP register to the corresponding bit from the first source SIMD&FP register when the original destination bit was 1, otherwise from the second source SIMD&FP register. Bitwise Select.

Bitwise Select.

Bitwise Select.

Bitwise Select.

Bitwise Select.

Bitwise Select.

Bitwise Select.

Bitwise Select.

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Bitwise Select. (128-bit)

Floating-point absolute compare greater than or equal

Floating-point absolute compare greater than or equal

Floating-point absolute compare greater than

Floating-point absolute compare greater than

Floating-point absolute compare less than or equal

Floating-point absolute compare less than or equal

Floating-point absolute compare less than

Floating-point absolute compare less than

Floating-point compare equal

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Floating-point compare equal

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Compare bitwise Equal (vector)

Floating-point compare greater than or equal

Compare signed greater than or equal

Compare signed greater than or equal

Compare signed greater than or equal

Compare unsigned greater than or equal

Compare unsigned greater than or equal

Compare unsigned greater than or equal

Floating-point compare greater than or equal

Compare signed greater than or equal

Compare signed greater than or equal

Compare signed greater than or equal

Compare unsigned greater than or equal

Compare unsigned greater than or equal

Compare unsigned greater than or equal

Floating-point compare greater than

Compare signed greater than

Compare signed greater than

Compare signed greater than

Compare unsigned highe

Compare unsigned highe

Compare unsigned highe

Floating-point compare greater than

Compare signed greater than

Compare signed greater than

Compare signed greater than

Compare unsigned highe

Compare unsigned highe

Compare unsigned highe

Floating-point compare less than or equal

Compare signed less than or equal

Compare signed less than or equal

Compare signed less than or equal

Compare unsigned less than or equal

Compare unsigned less than or equal

Compare unsigned less than or equal

Floating-point compare less than or equal

Compare signed less than or equal

Compare signed less than or equal

Compare signed less than or equal

Compare unsigned less than or equal

Compare unsigned less than or equal

Compare unsigned less than or equal

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Count leading sign bits

Floating-point compare less than

Compare signed less than

Compare signed less than

Compare signed less than

Compare unsigned less than

Compare unsigned less than

Compare unsigned less than

Floating-point compare less than

Compare signed less than

Compare signed less than

Compare signed less than

Compare unsigned less than

Compare unsigned less than

Compare unsigned less than

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Count leading zero bits

Population count per byte.

Population count per byte.

Population count per byte.

Population count per byte.

Population count per byte.

Population count per byte.

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Fixed-point convert to floating-point

Fixed-point convert to floating-point

Fixed-point convert to floating-point

Fixed-point convert to floating-point

Floating-point convert to fixed-point, rounding toward zero

Floating-point convert to fixed-point, rounding toward zero

Floating-point convert to signed fixed-point, rounding toward zero

Floating-point convert to unsigned fixed-point, rounding toward zero

Fixed-point convert to floating-point

Fixed-point convert to floating-point

Fixed-point convert to floating-point

Fixed-point convert to floating-point

Floating-point convert to fixed-point, rounding toward zero

Floating-point convert to fixed-point, rounding toward zero

Floating-point convert to signed fixed-point, rounding toward zero

Floating-point convert to unsigned fixed-point, rounding toward zero

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Set all vector lanes to the same value

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Vector bitwise exclusive or (vector)

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Extract vector from pair of vectors

Floating-point fused Multiply-Add to accumulator(vector)

Floating-point fused Multiply-Add to accumulator(vector)

Floating-point fused Multiply-Add to accumulator(vector)

Floating-point fused Multiply-Add to accumulator(vector)

Floating-point fused multiply-subtract from accumulator

Floating-point fused Multiply-subtract to accumulator(vector)

Floating-point fused multiply-subtract from accumulator

Floating-point fused Multiply-subtract to accumulator(vector)

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Move vector element to general-purpose register

Halving add

Halving add

Halving add

Halving add

Halving add

Halving add

Halving add

Halving add

Halving add

Halving add

Halving add

Halving add

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Signed halving subtract

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load one single-element structure and Replicate to all lanes (of one register).

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load one single-element structure to one lane of one register.

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load multiple single-element structures to one, two, three, or four registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

vld2_p64neon,aes

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load single 2-element structure and replicate to all lanes of two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load multiple 2-element structures to two registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to two registers

Load multiple 3-element structures to two registers

Load multiple 3-element structures to two registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

vld3_p64neon,aes

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load single 3-element structure and replicate to all lanes of three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to two registers

Load multiple 3-element structures to two registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load multiple 3-element structures to three registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

vld4_p64neon,aes

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load single 4-element structure and replicate to all lanes of four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load multiple 4-element structures to four registers

Load SIMD&FP register (immediate offset)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Floating-point Maximum Number (vector)

Floating-point Maximum Number (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Maximum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Floating-point Minimum Number (vector)

Floating-point Minimum Number (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Minimum (vector)

Floating-point multiply-add to accumulator

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Multiply-add to accumulator

Multiply-add to accumulator

Multiply-add to accumulator

Multiply-add to accumulator

Multiply-add to accumulator

Multiply-add to accumulator

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Vector widening multiply accumulate with scalar

Signed multiply-add long

Signed multiply-add long

Signed multiply-add long

Unsigned multiply-add long

Unsigned multiply-add long

Unsigned multiply-add long

Floating-point multiply-add to accumulator

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Vector multiply accumulate with scalar

Multiply-add to accumulator

Multiply-add to accumulator

Multiply-add to accumulator

Multiply-add to accumulator

Multiply-add to accumulator

Multiply-add to accumulator

Floating-point multiply-subtract from accumulator

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Vector widening multiply subtract with scalar

Signed multiply-subtract long

Signed multiply-subtract long

Signed multiply-subtract long

Unsigned multiply-subtract long

Unsigned multiply-subtract long

Unsigned multiply-subtract long

Floating-point multiply-subtract from accumulator

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Vector multiply subtract with scalar

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Multiply-subtract from accumulator

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Vector long move.

Vector long move.

Vector long move.

Vector long move.

Vector long move.

Vector long move.

Vector narrow integer.

Vector narrow integer.

Vector narrow integer.

Vector narrow integer.

Vector narrow integer.

Vector narrow integer.

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Duplicate vector element to vector or scalar

Multiply

Floating-point multiply

Multiply

Multiply

Multiply

Multiply

Floating-point multiply

Multiply

Multiply

Multiply

Multiply

Vector multiply by scalar

Vector multiply by scalar

Vector multiply by scalar

Vector multiply by scalar

Vector multiply by scalar

Polynomial multiply

Multiply

Multiply

Multiply

Multiply

Multiply

Multiply

Vector long multiply by scalar

Vector long multiply by scalar

Vector long multiply by scalar

Vector long multiply by scalar

Vector long multiply by scalar

Vector long multiply by scalar

Vector long multiply by scalar

Vector long multiply by scalar

Vector long multiply with scalar

Vector long multiply with scalar

Vector long multiply with scalar

Vector long multiply with scalar

Polynomial multiply long

Signed multiply long

Signed multiply long

Signed multiply long

Unsigned multiply long

Unsigned multiply long

Unsigned multiply long

Multiply

Floating-point multiply

Multiply

Multiply

Multiply

Multiply

Floating-point multiply

Multiply

Multiply

Multiply

Multiply

Vector multiply by scalar

Vector multiply by scalar

Vector multiply by scalar

Vector multiply by scalar

Vector multiply by scalar

Polynomial multiply

Multiply

Multiply

Multiply

Multiply

Multiply

Multiply

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Vector bitwise not.

Negate

Negate

Negate

Negate

Negate

Negate

Negate

Negate

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise inclusive OR NOT

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Vector bitwise or (immediate, inclusive)

Signed Add and Accumulate Long Pairwise.

Signed Add and Accumulate Long Pairwise.

Signed Add and Accumulate Long Pairwise.

Unsigned Add and Accumulate Long Pairwise.

Unsigned Add and Accumulate Long Pairwise.

Unsigned Add and Accumulate Long Pairwise.

Signed Add and Accumulate Long Pairwise.

Signed Add and Accumulate Long Pairwise.

Signed Add and Accumulate Long Pairwise.

Unsigned Add and Accumulate Long Pairwise.

Unsigned Add and Accumulate Long Pairwise.

Unsigned Add and Accumulate Long Pairwise.

Floating-point add pairwise

Add pairwise.

Add pairwise.

Add pairwise.

Add pairwise.

Add pairwise.

Add pairwise.

Signed Add Long Pairwise.

Signed Add Long Pairwise.

Signed Add Long Pairwise.

Unsigned Add Long Pairwise.

Unsigned Add Long Pairwise.

Unsigned Add Long Pairwise.

Signed Add Long Pairwise.

Signed Add Long Pairwise.

Signed Add Long Pairwise.

Unsigned Add Long Pairwise.

Unsigned Add Long Pairwise.

Unsigned Add Long Pairwise.

Folding maximum of adjacent pairs

Folding maximum of adjacent pairs

Folding maximum of adjacent pairs

Folding maximum of adjacent pairs

Folding maximum of adjacent pairs

Folding maximum of adjacent pairs

Folding maximum of adjacent pairs

Folding minimum of adjacent pairs

Folding minimum of adjacent pairs

Folding minimum of adjacent pairs

Folding minimum of adjacent pairs

Folding minimum of adjacent pairs

Folding minimum of adjacent pairs

Folding minimum of adjacent pairs

Singned saturating Absolute value

Singned saturating Absolute value

Singned saturating Absolute value

Singned saturating Absolute value

Singned saturating Absolute value

Singned saturating Absolute value

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Saturating add

Vector widening saturating doubling multiply accumulate with scalar

Vector widening saturating doubling multiply accumulate with scalar

Vector widening saturating doubling multiply accumulate with scalar

Vector widening saturating doubling multiply accumulate with scalar

Signed saturating doubling multiply-add long

Signed saturating doubling multiply-add long

Vector widening saturating doubling multiply subtract with scalar

Vector widening saturating doubling multiply subtract with scalar

Vector widening saturating doubling multiply subtract with scalar

Vector widening saturating doubling multiply subtract with scalar

Signed saturating doubling multiply-subtract long

Signed saturating doubling multiply-subtract long

Vector saturating doubling multiply high by scalar

Vector saturating doubling multiply high by scalar

Vector saturating doubling multiply high with scalar

Vector saturating doubling multiply high with scalar

Signed saturating doubling multiply returning high half

Signed saturating doubling multiply returning high half

Vector saturating doubling multiply high by scalar

Vector saturating doubling multiply high by scalar

Vector saturating doubling multiply high with scalar

Vector saturating doubling multiply high with scalar

Signed saturating doubling multiply returning high half

Signed saturating doubling multiply returning high half

Vector saturating doubling long multiply by scalar

Vector saturating doubling long multiply by scalar

Vector saturating doubling long multiply with scalar

Vector saturating doubling long multiply with scalar

Signed saturating doubling multiply long

Signed saturating doubling multiply long

Signed saturating extract narrow

Signed saturating extract narrow

Signed saturating extract narrow

Unsigned saturating extract narrow

Unsigned saturating extract narrow

Unsigned saturating extract narrow

Signed saturating extract unsigned narrow

Signed saturating extract unsigned narrow

Signed saturating extract unsigned narrow

Signed saturating negate

Signed saturating negate

Signed saturating negate

Signed saturating negate

Signed saturating negate

Signed saturating negate

Vector rounding saturating doubling multiply high by scalar

Vector rounding saturating doubling multiply high by scalar

Vector rounding saturating doubling multiply high by scalar

Vector rounding saturating doubling multiply high by scalar

Vector saturating rounding doubling multiply high with scalar

Vector saturating rounding doubling multiply high with scalar

Signed saturating rounding doubling multiply returning high half

Signed saturating rounding doubling multiply returning high half

Vector rounding saturating doubling multiply high by scalar

Vector rounding saturating doubling multiply high by scalar

Vector rounding saturating doubling multiply high by scalar

Vector rounding saturating doubling multiply high by scalar

Vector saturating rounding doubling multiply high with scalar

Vector saturating rounding doubling multiply high with scalar

Signed saturating rounding doubling multiply returning high half

Signed saturating rounding doubling multiply returning high half

Signed saturating rounding shift left

Signed saturating rounding shift left

Signed saturating rounding shift left

Signed saturating rounding shift left

Unsigned signed saturating rounding shift left

Unsigned signed saturating rounding shift left

Unsigned signed saturating rounding shift left

Unsigned signed saturating rounding shift left

Signed saturating rounding shift left

Signed saturating rounding shift left

Signed saturating rounding shift left

Signed saturating rounding shift left

Unsigned signed saturating rounding shift left

Unsigned signed saturating rounding shift left

Unsigned signed saturating rounding shift left

Unsigned signed saturating rounding shift left

Signed saturating rounded shift right narrow

Signed saturating rounded shift right narrow

Signed saturating rounded shift right narrow

Unsigned signed saturating rounded shift right narrow

Unsigned signed saturating rounded shift right narrow

Unsigned signed saturating rounded shift right narrow

Signed saturating rounded shift right unsigned narrow

Signed saturating rounded shift right unsigned narrow

Signed saturating rounded shift right unsigned narrow

Signed saturating shift left

Signed saturating shift left

Signed saturating shift left

Signed saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Signed saturating shift left

Signed saturating shift left

Signed saturating shift left

Signed saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Signed saturating shift left

Signed saturating shift left

Signed saturating shift left

Signed saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Signed saturating shift left

Signed saturating shift left

Signed saturating shift left

Signed saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Unsigned saturating shift left

Signed saturating shift left unsigned

Signed saturating shift left unsigned

Signed saturating shift left unsigned

Signed saturating shift left unsigned

Signed saturating shift left unsigned

Signed saturating shift left unsigned

Signed saturating shift left unsigned

Signed saturating shift left unsigned

Signed saturating shift right narrow

Signed saturating shift right narrow

Signed saturating shift right narrow

Unsigned saturating shift right narrow

Unsigned saturating shift right narrow

Unsigned saturating shift right narrow

Signed saturating shift right unsigned narrow

Signed saturating shift right unsigned narrow

Signed saturating shift right unsigned narrow

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Saturating subtract

Rounding Add returning High Narrow (high half).

Rounding Add returning High Narrow (high half).

Rounding Add returning High Narrow (high half).

Rounding Add returning High Narrow (high half).

Rounding Add returning High Narrow (high half).

Rounding Add returning High Narrow (high half).

Rounding Add returning High Narrow.

Rounding Add returning High Narrow.

Rounding Add returning High Narrow.

Rounding Add returning High Narrow.

Rounding Add returning High Narrow.

Rounding Add returning High Narrow.

Reciprocal estimate.

Unsigned reciprocal estimate

Reciprocal estimate.

Unsigned reciprocal estimate

Floating-point reciprocal step

Floating-point reciprocal step

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Vector reinterpret cast operation

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Reversing vector elements (swap endianness)

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Rounding halving add

Floating-point round to integral, to nearest with ties to even

Floating-point round to integral, to nearest with ties to even

Signed rounding shift left

Signed rounding shift left

Signed rounding shift left

Signed rounding shift left

Unsigned rounding shift left

Unsigned rounding shift left

Unsigned rounding shift left

Unsigned rounding shift left

Signed rounding shift left

Signed rounding shift left

Signed rounding shift left

Signed rounding shift left

Unsigned rounding shift left

Unsigned rounding shift left

Unsigned rounding shift left

Unsigned rounding shift left

Signed rounding shift right

Signed rounding shift right

Signed rounding shift right

Signed rounding shift right

Unsigned rounding shift right

Unsigned rounding shift right

Unsigned rounding shift right

Unsigned rounding shift right

Rounding shift right narrow

Rounding shift right narrow

Rounding shift right narrow

Rounding shift right narrow

Rounding shift right narrow

Rounding shift right narrow

Signed rounding shift right

Signed rounding shift right

Signed rounding shift right

Signed rounding shift right

Unsigned rounding shift right

Unsigned rounding shift right

Unsigned rounding shift right

Unsigned rounding shift right

Reciprocal square-root estimate.

Unsigned reciprocal square root estimate

Reciprocal square-root estimate.

Unsigned reciprocal square root estimate

Floating-point reciprocal square root step

Floating-point reciprocal square root step

Signed rounding shift right and accumulate

Signed rounding shift right and accumulate

Signed rounding shift right and accumulate

Signed rounding shift right and accumulate

Unsigned rounding shift right and accumulate

Unsigned rounding shift right and accumulate

Unsigned rounding shift right and accumulate

Unsigned rounding shift right and accumulate

Signed rounding shift right and accumulate

Signed rounding shift right and accumulate

Signed rounding shift right and accumulate

Signed rounding shift right and accumulate

Unsigned rounding shift right and accumulate

Unsigned rounding shift right and accumulate

Unsigned rounding shift right and accumulate

Unsigned rounding shift right and accumulate

Rounding subtract returning high narrow

Rounding subtract returning high narrow

Rounding subtract returning high narrow

Rounding subtract returning high narrow

Rounding subtract returning high narrow

Rounding subtract returning high narrow

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Insert vector element from another vector element

Shift left

Shift left

Shift left

Shift left

Shift left

Shift left

Shift left

Shift left

Signed Shift left

Signed Shift left

Signed Shift left

Signed Shift left

Unsigned Shift left

Unsigned Shift left

Unsigned Shift left

Unsigned Shift left

Signed shift left long

Signed shift left long

Signed shift left long

Signed shift left long

Signed shift left long

Signed shift left long

Shift left

Shift left

Shift left

Shift left

Shift left

Shift left

Shift left

Shift left

Signed Shift left

Signed Shift left

Signed Shift left

Signed Shift left

Unsigned Shift left

Unsigned Shift left

Unsigned Shift left

Unsigned Shift left

Shift right

Shift right

Shift right

Shift right

Shift right

Shift right

Shift right

Shift right

Shift right narrow

Shift right narrow

Shift right narrow

Shift right narrow

Shift right narrow

Shift right narrow

Shift right

Shift right

Shift right

Shift right

Shift right

Shift right

Shift right

Shift right

Signed shift right and accumulate

Signed shift right and accumulate

Signed shift right and accumulate

Signed shift right and accumulate

Unsigned shift right and accumulate

Unsigned shift right and accumulate

Unsigned shift right and accumulate

Unsigned shift right and accumulate

Signed shift right and accumulate

Signed shift right and accumulate

Signed shift right and accumulate

Signed shift right and accumulate

Unsigned shift right and accumulate

Unsigned shift right and accumulate

Unsigned shift right and accumulate

Unsigned shift right and accumulate

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures from one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple single-element structures to one, two, three, or four registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

vst2_p64neon,aes

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 2-element structures from two registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

vst3_p64neon,aes

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 3-element structures from three registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

vst4_p64neon,aes

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store multiple 4-element structures from four registers

Store SIMD&FP register (immediate offset)

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Subtract returning high narrow

Signed Subtract Long

Signed Subtract Long

Signed Subtract Long

Unsigned Subtract Long

Unsigned Subtract Long

Unsigned Subtract Long

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract

Subtract

Signed Subtract Wide

Signed Subtract Wide

Signed Subtract Wide

Unsigned Subtract Wide

Unsigned Subtract Wide

Unsigned Subtract Wide

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Transpose elements

Signed compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Unsigned compare bitwise Test bits nonzero

Unsigned compare bitwise Test bits nonzero

Unsigned compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Signed compare bitwise Test bits nonzero

Unsigned compare bitwise Test bits nonzero

Unsigned compare bitwise Test bits nonzero

Unsigned compare bitwise Test bits nonzero

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Unzip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors

Zip vectors