27#include "../switchtec_priv.h"
28#include "switchtec/utils.h"
36#define gas_reg_read8(dev, reg) __gas_read8(dev, &dev->gas_map->reg)
37#define gas_reg_read16(dev, reg) __gas_read16(dev, &dev->gas_map->reg)
38#define gas_reg_read32(dev, reg) __gas_read32(dev, &dev->gas_map->reg)
39#define gas_reg_read64(dev, reg) __gas_read64(dev, &dev->gas_map->reg)
41#define gas_reg_write8(dev, val, reg) __gas_write8(dev, val, \
43#define gas_reg_write16(dev, val, reg) __gas_write16(dev, val, \
45#define gas_reg_write32(dev, val, reg) __gas_write32(dev, val, \
47#define gas_reg_write64(dev, val, reg) __gas_write64(dev, val, \
55static int fw_toggle_noretry_subcmds[] = {
59 [MRPC_SECURITY_CONFIG_SET] = {1, 0, NULL},
60 [MRPC_KMSK_ENTRY_SET] = {1, 0, NULL},
61 [MRPC_SECURE_STATE_SET] = {1, 0, NULL},
62 [MRPC_BOOTUP_RESUME] = {1, 0, NULL},
63 [MRPC_DBG_UNLOCK] = {1, 0, NULL},
64 [MRPC_FW_TX] = {1, 1, fw_toggle_noretry_subcmds},
65 [MRPC_SECURITY_CONFIG_SET_GEN5] = {1, 0, NULL},
66 [MRPC_KMSK_ENTRY_SET_GEN5] = {1, 0, NULL},
67 [MRPC_SECURE_STATE_SET_GEN5] = {1, 0, NULL},
68 [MRPC_BOOTUP_RESUME_GEN5] = {1, 0, NULL},
69 [MRPC_DBG_UNLOCK_GEN5] = {1, 0, NULL},
70 [MRPC_FW_TX_GEN5] = {1, 1, fw_toggle_noretry_subcmds},
72static const int gasop_noretry_cmds_count =
sizeof(gasop_noretry_cmds) /
75static inline bool gasop_is_no_retry_cmd(uint32_t cmd,
int subcmd)
79 cmd &= SWITCHTEC_CMD_MASK;
81 if (cmd >= gasop_noretry_cmds_count)
83 if (gasop_noretry_cmds[cmd].no_retry == 0)
85 if (gasop_noretry_cmds[cmd].num_subcmd == 0)
87 for (i = 0; i < gasop_noretry_cmds[cmd].num_subcmd; i++) {
88 if (subcmd == gasop_noretry_cmds[cmd].subcmds[i])
95int gasop_access_check(
struct switchtec_dev *dev)
99 device_id = gas_reg_read32(dev, sys_info.device_id);
105void gasop_set_partition_info(
struct switchtec_dev *dev)
107 dev->partition = gas_reg_read8(dev, top.partition_id);
108 dev->partition_count = gas_reg_read8(dev, top.partition_count);
111int gasop_cmd(
struct switchtec_dev *dev, uint32_t cmd,
112 const void *payload,
size_t payload_len,
void *resp,
115 struct mrpc_regs __gas *mrpc = &dev->gas_map->mrpc;
118 uint8_t subcmd = 0xff;
120 __memcpy_to_gas(dev, &mrpc->input_data, payload, payload_len);
136 subcmd = *(uint8_t*)payload;
137 if (gasop_is_no_retry_cmd(cmd, subcmd))
138 __gas_write32_no_retry(dev, cmd, &mrpc->cmd);
140 __gas_write32(dev, cmd, &mrpc->cmd);
145 status = __gas_read32(dev, &mrpc->status);
146 if (status != SWITCHTEC_MRPC_STATUS_INPROGRESS)
150 if (status == SWITCHTEC_MRPC_STATUS_INTERRUPTED) {
155 if(status == SWITCHTEC_MRPC_STATUS_ERROR) {
156 errno = __gas_read32(dev, &mrpc->ret_value);
160 if (status != SWITCHTEC_MRPC_STATUS_DONE) {
165 ret = __gas_read32(dev, &mrpc->ret_value);
170 __memcpy_from_gas(dev, resp, &mrpc->output_data, resp_len);
175int gasop_get_device_id(
struct switchtec_dev *dev)
177 return gas_reg_read32(dev, sys_info.device_id);
180int gasop_get_fw_version(
struct switchtec_dev *dev,
char *buf,
185 ver = gas_reg_read32(dev, sys_info.firmware_version);
186 version_to_string(ver, buf, buflen);
191int gasop_pff_to_port(
struct switchtec_dev *dev,
int pff,
192 int *partition,
int *port)
200 for (part = 0; part < dev->partition_count; part++) {
201 pcfg = &dev->gas_map->part_cfg[part];
204 reg = __gas_read32(dev, &pcfg->usp_pff_inst_id);
210 reg = __gas_read32(dev, &pcfg->vep_pff_inst_id);
212 *port = SWITCHTEC_PFF_PORT_VEP;
216 for (i = 0; i < ARRAY_SIZE(pcfg->dsp_pff_inst_id); i++) {
217 reg = __gas_read32(dev, &pcfg->dsp_pff_inst_id[i]);
233int gasop_port_to_pff(
struct switchtec_dev *dev,
int partition,
239 partition = dev->partition;
240 }
else if (partition >= dev->partition_count) {
245 pcfg = &dev->gas_map->part_cfg[partition];
249 *pff = __gas_read32(dev, &pcfg->usp_pff_inst_id);
251 case SWITCHTEC_PFF_PORT_VEP:
252 *pff = __gas_read32(dev, &pcfg->vep_pff_inst_id);
255 if (port > ARRAY_SIZE(pcfg->dsp_pff_inst_id)) {
260 *pff = __gas_read32(dev, &pcfg->dsp_pff_inst_id[port - 1]);
267static void set_fw_info_part(
struct switchtec_dev *dev,
269 struct partition_info __gas *pi)
271 info->
part_addr = __gas_read32(dev, &pi->address);
272 info->
part_len = __gas_read32(dev, &pi->length);
275int gasop_flash_part(
struct switchtec_dev *dev,
277 enum switchtec_fw_image_part_id_gen3 part)
281 uint32_t active_addr = -1;
284 info->running =
false;
285 info->active =
false;
288 case SWITCHTEC_FW_PART_ID_G3_IMG0:
289 active_addr = __gas_read32(dev, &fi->active_img.address);
290 set_fw_info_part(dev, info, &fi->img0);
292 val = __gas_read16(dev, &si->img_running);
293 if (val == SWITCHTEC_IMG0_RUNNING)
294 info->running =
true;
297 case SWITCHTEC_FW_PART_ID_G3_IMG1:
298 active_addr = __gas_read32(dev, &fi->active_img.address);
299 set_fw_info_part(dev, info, &fi->img1);
301 val = __gas_read16(dev, &si->img_running);
302 if (val == SWITCHTEC_IMG1_RUNNING)
303 info->running =
true;
306 case SWITCHTEC_FW_PART_ID_G3_DAT0:
307 active_addr = __gas_read32(dev, &fi->active_cfg.address);
308 set_fw_info_part(dev, info, &fi->cfg0);
310 val = __gas_read16(dev, &si->cfg_running);
311 if (val == SWITCHTEC_CFG0_RUNNING)
312 info->running =
true;
315 case SWITCHTEC_FW_PART_ID_G3_DAT1:
316 active_addr = __gas_read32(dev, &fi->active_cfg.address);
317 set_fw_info_part(dev, info, &fi->cfg1);
319 val = __gas_read16(dev, &si->cfg_running);
320 if (val == SWITCHTEC_CFG1_RUNNING)
321 info->running =
true;
324 case SWITCHTEC_FW_PART_ID_G3_NVLOG:
325 set_fw_info_part(dev, info, &fi->nvlog);
338int gasop_event_summary(
struct switchtec_dev *dev,
347 memset(sum, 0,
sizeof(*sum));
349 sum->
global = gas_reg_read32(dev, sw_event.global_summary);
350 sum->
part_bitmap = gas_reg_read64(dev, sw_event.part_event_bitmap);
352 for (i = 0; i < dev->partition_count; i++) {
353 reg = gas_reg_read32(dev, part_cfg[i].part_event_summary);
355 if (i == dev->partition)
359 for (i = 0; i < SWITCHTEC_MAX_PFF_CSR; i++) {
360 reg = gas_reg_read16(dev, pff_csr[i].vendor_id);
361 if (reg != MICROSEMI_VENDOR_ID)
364 sum->
pff[i] = gas_reg_read32(dev, pff_csr[i].pff_event_summary);
370static uint32_t __gas *global_ev_reg(
struct switchtec_dev *dev,
371 size_t offset,
int index)
373 return (
void __gas *)&dev->gas_map->sw_event + offset;
376static uint32_t __gas *part_ev_reg(
struct switchtec_dev *dev,
377 size_t offset,
int index)
379 return (
void __gas *)&dev->gas_map->part_cfg[index] + offset;
382static uint32_t __gas *pff_ev_reg(
struct switchtec_dev *dev,
383 size_t offset,
int index)
385 return (
void __gas *)&dev->gas_map->pff_csr[index] + offset;
388#define EV_GLB(i, r)[SWITCHTEC_GLOBAL_EVT_ ## i] = \
389 {offsetof(struct sw_event_regs, r), global_ev_reg}
390#define EV_PAR(i, r)[SWITCHTEC_PART_EVT_ ## i] = \
391 {offsetof(struct part_cfg_regs, r), part_ev_reg}
392#define EV_PFF(i, r)[SWITCHTEC_PFF_EVT_ ## i] = \
393 {offsetof(struct pff_csr_regs, r), pff_ev_reg}
397 uint32_t __gas *(*map_reg)(
struct switchtec_dev *stdev,
398 size_t offset,
int index);
400 EV_GLB(STACK_ERROR, stack_error_event_hdr),
401 EV_GLB(PPU_ERROR, ppu_error_event_hdr),
402 EV_GLB(ISP_ERROR, isp_error_event_hdr),
403 EV_GLB(SYS_RESET, sys_reset_event_hdr),
404 EV_GLB(FW_EXC, fw_exception_hdr),
405 EV_GLB(FW_NMI, fw_nmi_hdr),
406 EV_GLB(FW_NON_FATAL, fw_non_fatal_hdr),
407 EV_GLB(FW_FATAL, fw_fatal_hdr),
408 EV_GLB(TWI_MRPC_COMP, twi_mrpc_comp_hdr),
409 EV_GLB(TWI_MRPC_COMP_ASYNC, twi_mrpc_comp_async_hdr),
410 EV_GLB(CLI_MRPC_COMP, cli_mrpc_comp_hdr),
411 EV_GLB(CLI_MRPC_COMP_ASYNC, cli_mrpc_comp_async_hdr),
412 EV_GLB(GPIO_INT, gpio_interrupt_hdr),
413 EV_GLB(GFMS, gfms_event_hdr),
414 EV_PAR(PART_RESET, part_reset_hdr),
415 EV_PAR(MRPC_COMP, mrpc_comp_hdr),
416 EV_PAR(MRPC_COMP_ASYNC, mrpc_comp_async_hdr),
417 EV_PAR(DYN_PART_BIND_COMP, dyn_binding_hdr),
418 EV_PFF(AER_IN_P2P, aer_in_p2p_hdr),
419 EV_PFF(AER_IN_VEP, aer_in_vep_hdr),
420 EV_PFF(DPC, dpc_hdr),
421 EV_PFF(CTS, cts_hdr),
422 EV_PFF(UEC, uec_hdr),
423 EV_PFF(HOTPLUG, hotplug_hdr),
424 EV_PFF(IER, ier_hdr),
425 EV_PFF(THRESH, threshold_hdr),
426 EV_PFF(POWER_MGMT, power_mgmt_hdr),
427 EV_PFF(TLP_THROTTLING, tlp_throttling_hdr),
428 EV_PFF(FORCE_SPEED, force_speed_hdr),
429 EV_PFF(CREDIT_TIMEOUT, credit_timeout_hdr),
430 EV_PFF(LINK_STATE, link_state_hdr),
433static uint32_t __gas *event_hdr_addr(
struct switchtec_dev *dev,
439 if (e < 0 || e >= SWITCHTEC_MAX_EVENTS)
442 off = event_regs[e].offset;
444 if (event_regs[e].map_reg == part_ev_reg) {
446 index = dev->partition;
447 else if (index >= dev->partition_count)
449 }
else if (event_regs[e].map_reg == pff_ev_reg) {
450 if (index < 0 || index >= SWITCHTEC_MAX_PFF_CSR)
454 return event_regs[e].map_reg(dev, off, index);
458 int index,
int flags, uint32_t data[5])
464 reg = event_hdr_addr(dev, e, index);
470 hdr = __gas_read32(dev, reg);
472 for (i = 0; i < 5; i++)
473 data[i] = __gas_read32(dev, ®[i + 1]);
475 if (!(flags & SWITCHTEC_EVT_FLAG_CLEAR))
476 hdr &= ~SWITCHTEC_EVENT_CLEAR;
477 if (flags & SWITCHTEC_EVT_FLAG_EN_POLL)
478 hdr |= SWITCHTEC_EVENT_EN_IRQ;
479 if (flags & SWITCHTEC_EVT_FLAG_EN_LOG)
480 hdr |= SWITCHTEC_EVENT_EN_LOG;
481 if (flags & SWITCHTEC_EVT_FLAG_EN_CLI)
482 hdr |= SWITCHTEC_EVENT_EN_CLI;
483 if (flags & SWITCHTEC_EVT_FLAG_EN_FATAL)
484 hdr |= SWITCHTEC_EVENT_FATAL;
485 if (flags & SWITCHTEC_EVT_FLAG_DIS_POLL)
486 hdr &= ~SWITCHTEC_EVENT_EN_IRQ;
487 if (flags & SWITCHTEC_EVT_FLAG_DIS_LOG)
488 hdr &= ~SWITCHTEC_EVENT_EN_LOG;
489 if (flags & SWITCHTEC_EVT_FLAG_DIS_CLI)
490 hdr &= ~SWITCHTEC_EVENT_EN_CLI;
491 if (flags & SWITCHTEC_EVT_FLAG_DIS_FATAL)
492 hdr &= ~SWITCHTEC_EVENT_FATAL;
495 __gas_write32(dev, hdr, reg);
497 return (hdr >> 5) & 0xFF;
501 int index,
int flags, uint32_t data[5])
506 if (e >= SWITCHTEC_MAX_EVENTS)
509 if (index == SWITCHTEC_EVT_IDX_ALL) {
510 if (event_regs[e].map_reg == global_ev_reg)
512 else if (event_regs[e].map_reg == part_ev_reg)
513 nr_idxs = dev->partition_count;
514 else if (event_regs[e].map_reg == pff_ev_reg)
515 nr_idxs = gas_reg_read8(dev, top.pff_count);
519 for (index = 0; index < nr_idxs; index++) {
520 ret = event_ctl(dev, e, index, flags, data);
525 ret = event_ctl(dev, e, index, flags, data);
535int gasop_event_wait_for(
struct switchtec_dev *dev,
541 long long start, now;
550 SWITCHTEC_EVT_FLAG_CLEAR |
551 SWITCHTEC_EVT_FLAG_EN_POLL,
556 ret = gettimeofday(&tv, NULL);
560 now = start = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
570 ret = gettimeofday(&tv, NULL);
574 now = ((tv.tv_sec) * 1000 + tv.tv_usec / 1000);
576 if (timeout_ms > 0 && now - start >= timeout_ms)
int switchtec_event_ctl(struct switchtec_dev *dev, enum switchtec_event_id e, int index, int flags, uint32_t data[5])
Enable, disable and clear events or retrieve event data.
int switchtec_event_summary_set(struct switchtec_event_summary *sum, enum switchtec_event_id e, int index)
Set a bit corresponding to an event in a summary structure.
int switchtec_event_check(struct switchtec_dev *dev, struct switchtec_event_summary *chk, struct switchtec_event_summary *res)
Check if one or more events have occurred.
uint64_t part_bitmap
Bitmap of partitions with active events.
uint64_t global
Bitmap of global events.
unsigned part[SWITCHTEC_MAX_PARTS]
Bitmap of events in each partition.
unsigned local_part
Bitmap of events in the local partition.
unsigned pff[SWITCHTEC_MAX_PFF_CSR]
Bitmap of events in each port function.
Information about a firmware image or partition.
size_t part_addr
Address of the partition.
size_t part_len
Length of the partition.
switchtec_event_id
Enumeration of all possible events.